Pentium Processor System Architecture
by MindShare, Inc.; Anderson, Don; Shanley, TomEdition: 2nd
Format: Paperback
Pub. Date: 1995-04-06
Publisher(s): Addison-Wesley Professional
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Summary
Describes the hardware architecture of computers using Intel's family of Pentium processors, providing a clear, concise explanation of the microprocessor's relationship to the rest of the system.
Author Biography
MindShare, Inc. is one of the leading technical training companies in the hardware industry, providing innovative courses for dozens of companies, including Intel, IBM, and Compaq.
Don Anderson is the author of many MindShare books. He passes on his wealth of experience in digital electronics and computer design by training engineers, programmers, and technicians for MindShare.
Tom Shanley, president of MindShare, Inc., is one of the world's foremost authorities on computer system architecture. In the course of his career, he has trained thousands of engineers in hardware and software design.
0201409925AB07142003
Table of Contents
| Acknowledgments | |
| About This Book | p. 1 |
| Introduction to the Pentium Processors | p. 9 |
| The Functional Units | p. 23 |
| Pentium Cache Overview | p. 35 |
| Multiple Processors and the MESI Model | p. 61 |
| Pentium Signal Interface | p. 93 |
| The Code Cache and Instruction Pipeline | p. 137 |
| The Data Cache and Burst Bus Cycles | p. 163 |
| Summary of Pentium Bus Cycles | p. 209 |
| System Management Mode (SMM) | p. 221 |
| Summary of Software Changes | p. 235 |
| Test and Debug | p. 255 |
| P54C Processor Overview | p. 281 |
| P54C Signals | p. 285 |
| Dual Processors | p. 295 |
| The APIC | p. 317 |
| P54C SMM Enhancements | p. 373 |
| The Pentium 610/75MHz Processor | p. 381 |
| OverDrive Processors/Sockets | p. 383 |
| Appendix A: Glossary of Terms | p. 389 |
| Appendix B: Signal Glossary | p. 405 |
| Appendix C: Instruction Pairing Summary | p. 417 |
| Appendix D: References | p. 423 |
| Index | p. 427 |
| Table of Contents provided by Blackwell. All Rights Reserved. |
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